Elevate your engineering career as a Design Verification Engineer with Qualcomm in Canada, specializing in memory subsystem verification. Drive comprehensive strategies for complex digital designs, including memory controllers and custom interfaces. This position demands expertise in developing and executing verification plans within a creative team at Qualcomm.

You will work hands-on with Verilog, SystemVerilog, and UVM, focusing on high-performance memory components such as DDR, LPDDR, and HBM. Collaborate closely with cross-functional teams to ensure functional correctness through the complete verification lifecycle. Key Responsibilities:

- Develop test and verification plans for complex RTL designs
- Build and maintain reusable UVM verification environments




- Create and execute various test types like constrained-random
- Write SystemVerilog Assertions for protocol and timing verification
- Perform root-cause analysis and debug verification failures Requirements:
- Bachelor’s or Master’s degree in relevant fields
- 3–10 years of experience in ASIC or SoC verification
- Strong skills in Verilog, SystemVerilog, and UVM
- Familiarity with memory technologies and JEDEC standards
- Proficiency in simulation tools and waveform analysis Contribute your skills in memory technology verification to Qualcomm's creative projects in Canada.

📌 Design Verification Engineer at Qualcomm (Markham)
🏢 MaC VC
📍 Markham