Elevate your career with Synopsys as a Senior Package Design Engineer, where your decade-long experience shapes advanced IP test chip architectures. Drive signal integrity and power integrity for cutting-edge semiconductor solutions. You will lead the design of multiple test-chip packages, collaborating across teams and with external partners. Your expertise in package architecture evaluation and hands-on design using Ansys HFSS will be vital for optimizing performance. This role calls for a deep understanding of electrical modeling and effective communication with stakeholders throughout the project lifecycle. Key Responsibilities:
Lead package designs from requirements to final delivery
Define and optimize bump maps and layer stack-ups
Perform hands-on design of advanced package substrates
Analyze electrical models against SI and PI requirements
Provide expert guidance through architectural evaluations
Requirements:
10+ years in semiconductor package design
Advanced knowledge of circuit theory and transmission line behavior
Experience with Ansys HFSS or similar tools
Robust communication skills in English
Bachelor's in electrical engineering or equivalent
Bring your skills in package architecture and design to provide exceptional value to Synopsys customers. #J-18808-Ljbffr