Join Qualcomm Canada ULC as a Design Verification Engineer focusing on memory subsystems. This role involves executing verification strategies for advanced digital designs, particularly in memory controllers and interfaces.

As a key member of Qualcomm's memory subsystem verification team, your responsibilities will include developing UVM-based testbenches and conducting comprehensive analysis of design specifications. The ideal candidate will be skilled in SystemVerilog and UVM and possess a robust understanding of digital verification methodologies, contributing to successful project outcomes through rigorous testing and debugging.

Key Responsibilities: • Develop verification strategies and test plans for RTL designs • Create and maintain UVM-based verification environments • Execute directed, constrained-random,



and corner-case tests • Write SystemVerilog Assertions for protocol and functional verification • Collaborate with cross-functional teams for design validation

Requirements: • Bachelor’s or Master’s degree in relevant fields • 3–10 years of ASIC or SoC design verification experience • Proficiency in Verilog, SystemVerilog, and UVM • Experience with simulation-based verification and debugging • Strong analytical and communication skills

Contribute your expertise in digital design and verification to drive advancements in memory technology at Qualcomm Canada ULC. #J-18808-Ljbffr

📌 Design Verification Engineer for Memory Systems (Winnipeg)
🏢 QUALCOMM
📍 Winnipeg