Elevate your career with AMD as a Silicon Design Verification Engineer in our SOC Verification Team. Engage with state-of-the-art technology and lead cutting-edge verification strategies.
In this role, you will collaborate with senior engineers to devise test plans for intricate IP designs, utilizing UVM methodology and System Verilog. You will have the chance to design testbenches, enhance verification environments, and debug tests alongside design engineers to ensure functional accuracy. This position is pivotal for ensuring quality metrics in design verification.
Key Responsibilities:
• Create test plans for complex IP designs
• Design testbenches using System Verilog and UVM
• Enhance verification environments for optimal testing
• Debug tests with design engineers for accuracy
• Coordinate with RTL engineers on logic design
Requirements:
• Bachelor’s or Master’s in Computer/Electrical Engineering
• Experience in digital design and architectural concepts
• Knowledge of System Verilog, C++, and Python
• Familiarity with UVM and related verification tools
• Prior experience in design/verification preferred
Unleash your expertise in digital design and verification at AMD, shaping technology for a better future.
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