What You’ll Be DoingValidate and characterize DDR, LPDDR, and HBM memory interface IP on silicon, running experiments that prove functionality, performance, and reliability before customer shipmentDevelop and execute test programs on Teradyne J750 ATE, collecting high-volume data across parametric, functional, and stress conditionsAutomate lab equipment using Python to control oscilloscopes, spectrum analyzers, logic analyzers, and power supplies for repeatable, scalable testingDebug silicon issues by analyzing measurement data, correlating results across bench and ATE environments, and working with design and firmware teams to isolate root causeAssess IP reliability through Latch‑up, HBM, CDM, HTOL, and ELFR testing, documenting results in characterization reports that guide product release decisionsDesign PCB test boards and ATE load boards, working from schematics and layouts to ensure design performs to specification and achieves accurate measurementsAddress customer issues by providing detailed debug, guidance, and driving issues toward resolutionThe Impact You Will HaveYour validation work directly determines whether Synopsys memory IP is ready to ship, affecting product timelines and customer confidence across the semiconductor industryThe test automation you build scales across multiple IP products and releases, reducing validation cycle time and increasing coverageYour characterization reports become the technical foundation for customer engagements, sales collateral, and internal design reviewsDebug rigor you bring to silicon issues prevents costly respins and field failures, protecting both schedule and reputationTest methodologies you develop and standardize become the playbook for future validation engineers joining the Nepean labCustomer issues you resolve keep high‑stakes programs moving,



often under tight timelines where your responsiveness is the difference between a delay and a winThe data you collect and analyze feeds back into design improvements, tightening the loop between silicon and specificationWhat You’ll NeedBachelor’s or master’s degree in electrical engineering or computer engineering3–5 years of hands‑on SOC or silicon validation experience, with a strong track record of bringing chips from first silicon to production release3+ years scripting in Python, C++, MATLAB, TCL, Perl, or Visual Basic to automate test sequences, data collection, and analysis workflows2+ years of experience and good understanding of PCB board design or ATE load board design, command over schematics and layout design tools (OrCAD, Altium, Mentor Graphics, KiCAD)2+ years of experience and valuable knowledge of hardware troubleshooting and PCB debugExpertise with lab instruments including oscilloscopes, spectrum analyzers, logic analyzers, and network analyzers, making precision measurements that hold up under scrutinyHands‑on lab/debug experience validating digital and analog blocksExperience with high‑volume data analysis and statistical methods to assess performance trends, yield, and reliability across large datasetsGood to have: experience with DDR, LPDDR, or HBM protocol validation; prior knowledge of ATE platforms such as Teradyne, LTX, Advantest, or Credence; familiarity with JEDEC specifications, jitter analysis, timing characterization,



ESD testing, or automotive qualification standards is a strong plusWho You AreYou can walk into a lab with a failing test case and walk out two hours later with a root cause and a plan, not just a theoryWhen data does not make sense, you do not move on; you dig deeper until itdoes, even if that means questioning the test setup or the spec itselfYou are comfortable presenting technical results to design teams, customers, and leadership, translating measurement data into clear conclusions without losing nuanceYou manage multiple validation streams at once, keeping track of what is blocked, what is running, and what needs attention next without dropping threadsYou do not wait for perfect documentation or a fully defined test plan; you work with what you have, ask the right questions, and start collecting dataYou care about the details—probe placement, grounding, signal integrity, calibration—because you know those details separate good data from noiseThe Team You’ll Be Part OfYou will join the growing Nepean lab team focused on validating Synopsys’ memory interface IP portfolio. This is a hands‑on lab environment where you will work closely with firmware and design groups to bring new IP from silicon bring‑up through production release. The team operates at the intersection of design intent and real‑world silicon behavior, and your work will directly inform product readiness and customer deployments.Rewards And BenefitsWe offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non‑monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.#J-18808-Ljbffr

📌 Staff Validation/Verification Engineer - 17399 (Ottawa)
🏢 Synopsys
📍 Ottawa