Elevate your career as a Memory Layout Engineer with expertise in TSMC technologies for high-performance semiconductor designs. This role emphasizes memory layout development, physical verification, and integration on advanced node processes.

Your expertise in memory layout design will allow you to tackle complex challenges in optimizing layouts for critical memory components. Engage in top-level integration while ensuring compliance with physical verification standards. Collaborate effectively with design teams to enhance performance and quality throughout the layout process.

Key Responsibilities:
• Implement custom designs for memory block layouts
• Optimize critical components including SRAM architecture
• Drive top-level memory integration and assembly




• Execute verification checks and ensure layout integrity
• Manage IR drop and Electromigration analysis efforts

Requirements:
• Degree in Electrical/Electronics Engineering or related field
• Experience with advanced memory layout designs
• Hands-on work with TSMC 7nm technology
• Familiarity with leading layout verification tools
• Strong analytical and debugging capabilities

Leverage your expertise in advanced memory design and contribute to cutting-edge semiconductor solutions.
#J-18808-Ljbffr

📌 Memory Layout Engineer with TSMC Focus (Quebec City)
🏢 Odyssey Global
📍 Quebec City