Become a Senior Digital ASIC Design Expert at Ciena, specializing in high-speed connectivity solutions. Work within a collaborative framework while influencing future telecommunications tech. This influential position calls for a seasoned engineer to lead the design and integration of ASIC technologies for WaveLogic products. Engage with teams to develop RTL designs, enhance tech libraries, and validate prototypes in a lab setting. Key Responsibilities: - Lead ASIC design and integration for WaveLogic - Collaborate on architecture specifications with system engineers - Develop top-level RTL designs incorporating various IP blocks - Manage tool flows to support ASIC integration processes - Validate designs through ASIC prototypes in a lab setting Requirements: - Bachelor’s degree in relevant engineering field - Over 5 years of ASIC design experience - Proficient in Verilog, SystemVerilog, and Python - Strong analytical skills related to timing and synthesis - Excellent written and verbal communication abilities Shape the future of networking technology while contributing to Ciena's mission. #J-18808-Ljbffr

📌 Ciena Senior Digital Asic Design Expert (Ottawa)
🏢 Ciena
📍 Ottawa