Build and verify FPGA digital logic for SEL's communications portfolio in Burnaby, BC, with VHDL, test planning, and timing analysis expertise. This Engineer works within SEL's R&D; Communications product group on SONET/VSN Multiplexers, Ethernet Circuit Emulation Gateways, network clocks, and Ethernet switches. The position emphasizes RTL functional verification, test harnesses, simulation, synthesis, timing analysis, and accurate technical documentation. It also involves preparing specifications and reviewing designs with cross-discipline teams. Key Responsibilities:





Develop test harnesses and stimulus for RTL verification Prepare design and system level specifications Maintain accurate RTL design documentation Moderate peer reviews of designs and test plans Support communication product development and enhancements Requirements:

Five-plus years across RTL, hardware, and firmware practices FPGA design using VHDL or Verilog Simulation, synthesis, and digital logic timing analysis Functional verification of RTL digital logic Robust technical writing, documentation, and speaking skills Use verification, FPGA, and digital logic skills to support SEL communication products and reliable electric power systems.

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📌 FPGA Digital Logic Verification Engineer (Winnipeg)
🏢 Schweitzer Engineering Laboratories (SEL)
📍 Winnipeg