Drive high speed compliance validation for Qualcomm’s ASIC Engineering group, focusing on PHY testing, signal integrity, and silicon evaluation.

This Senior High Speed Validation Engineer characterizes analog blocks and performs PHY, Link Layer, and protocol compliance against industry standards. You will study signal and power integrity for evaluation boards and silicon while developing automated testing approaches. The role also includes determining laboratory equipment needs, debugging issues, presenting results, and completing validation reports.

Key Responsibilities:

- Perform PHY, Link Layer, and protocol compliance testing
- Characterize analog blocks across high speed interfaces
- Evaluate signal and power integrity on boards and silicon




- Standardize test scripts and automate test equipment
- Present test results and deliver full validation reports

Requirements:

- Degree in Science, Engineering, or related field
- Required ASIC experience based on degree level
- High speed interface validation or debug experience
- Understanding of PLL, CDR, CTLE, FFE, and DFE
- Experience with scopes, BERTs, VNAs, and multimeters

Use compliance testing, signal integrity, laboratory automation, and ASIC validation skills to evaluate Qualcomm high speed silicon.

📌 ASIC High Speed Compliance Engineer (Toronto)
🏢 QUALCOMM
📍 Toronto