Drive high speed compliance validation for Qualcomm’s ASIC Engineering group, focusing on PHY testing, signal integrity, and silicon evaluation.
This Senior High Speed Validation Engineer characterizes analog blocks and performs PHY, Link Layer, and protocol compliance against industry standards. You will study signal and power integrity for evaluation boards and silicon while developing automated testing approaches. The role also includes determining laboratory equipment needs, debugging issues, presenting results, and completing validation reports.
Key Responsibilities
Perform PHY, Link Layer,
and protocol compliance testingCharacterize analog blocks across high speed interfacesEvaluate signal and power integrity on boards and siliconStandardize test scripts and automate test equipmentPresent test results and deliver full validation reportsRequirements: Degree in Science, Engineering, or related fieldRequired ASIC experience based on degree levelHigh speed interface validation or debug experienceUnderstanding of PLL, CDR, CTLE, FFE, and DFEExperience with scopes, BERTs, VNAs, and multimetersUse compliance testing, signal integrity, laboratory automation, and ASIC validation skills to evaluate Qualcomm high speed silicon.