Excel in silicon validation with Synopsys as a Senior Staff Engineer. Your expertise in ATE programming and deep knowledge of DDR and HBM protocols will drive product readiness.
Develop ATE test programs for memory interfaces
- Perform electrical characterization using advanced lab equipment
- Debug mixed-signal systems for root cause analysis
- Validate IP against JEDEC and automotive standards
- Generate detailed technical documentation and reportsRequirements:
- Experience with jitter analysis and timing validation
- Bachelor's or Master's in Electrical EngineeringLeverage your validation expertise to ensure Synopsys memory IP meets critical quality and reliability standards.#