Build Soft IP expertise at Qualcomm Canada in Ottawa through ASIC design, RTL testing, and verification with SystemVerilog and UVM.

As a four-month ASIC engineering co-op, you will contribute to world-class technologies with an experienced Soft IP team. The work spans design and verification of IP blocks and subsystems for FPGA and ASIC applications. You will gain practical semiconductor experience while supporting project delivery and technical documentation.

Key Responsibilities

Work with engineers delivering standards-compliant IP blocks

Design and document RTL using Verilog

Create verification environments with SystemVerilog and UVM

Develop and run RTL test cases

Issue and track defects through closure

Requirements

Study Electrical Engineering, Computer Engineering, Computer Science, or related discipline

Complete second year of bachelor’s or pursue a master’s degree

Demonstrate one-plus academic programming experience with C, C++, or Python

Understand digital logic, ASIC or FPGA flows, or digital design

Work independently while collaborating effectively with the group

Apply your programming, verification, problem-solving, and digital logic foundation within Qualcomm’s Soft IP engineering team.

📌 Soft IP ASIC Engineering Intern Ottawa (Montreal)
🏢 Qualcomm
📍 Montreal