Elevate ASIC design verification as a Senior Specialist. Utilize advanced methodologies to drive innovation and efficiency in verification processes, collaborating with top-tier engineers.
As part of the verification team, you will play a critical role in validating designs and architectures for inference accelerators. Candidates should have over 8 years of industry experience and expertise in SystemVerilog, UVM, and relevant verification tools. This position requires a blend of analytical and debugging skills to optimize automated workflows and implement cutting-edge verification techniques.
Key Responsibilities
Oversee verification of ASIC designs and architecture
Define and create robust verification infrastructure
Implement effective automated verification processes
Collaborate closely with architects and designers
Innovate by applying current trends in ASIC verification
Requirements
Bachelors in EE, CS, or CE with 8+ years of experience
Proficient in SystemVerilog and UVM methodologies
Experienced with SoC-level structural testing
Familiar with verification tools such as VCS and Verdi
Knowledge in applying machine learning to verification flows
Utilize your skills in ASIC verification to influence design quality and efficiency, advancing industry standards and practices.