SystemVerilog and Python power pre-silicon validation at Qualcomm Technologies in San Diego, where this onsite engineering role supports ASIC and FPGA designs. This Junior/Senior Emulation Engineer develops environments for complex SoC designs. The work combines RTL verification, system-level debugging, software-hardware co-validation, and automation. You will create testbenches and verification infrastructure using SystemVerilog, C/C++, Linux, shell scripting, and Python. Key Responsibilities:

Develop and maintain ASIC and FPGA emulation environments Port RTL designs onto emulation and FPGA platforms Enable early hardware/software co-validation with engineering teams Debug functional, performance, and system-level emulation issues Create automation workflows for regressions and efficient debugging Requirements:

Bachelor's or master's degree in a related technical field Zero to two or more years in verification or emulation Robust SystemVerilog, C/C++, Linux, and Python skills Experience with RTL debugging and waveform analysis Knowledge of SoC architectures and bus protocols Apply ASIC emulation, RTL verification, Python automation, and system debugging to pre-silicon validation at Qualcomm Technologies.

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📌 Junior ASIC Emulation Engineer (Winnipeg)
🏢 QUALCOMM
📍 Winnipeg