11 Nov
|
Ciena Canada
|
Quebec City
11 Nov
Ciena Canada
Quebec City
Ciena Canada in Ottawa is seeking a Senior Digital ASIC Verification Engineer to lead verification of high‑speed, highly integrated digital ASICs, focusing on top‑level functionality, cross‑IP interactions and system‑level use cases.
You will own verification activities, develop SystemVerilog/UVM environments, create test scenarios, debug failures, and guide junior engineers while advancing verification methodology.
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📌 Senior ASIC Verification Engineer, SystemVerilog/UVM (Quebec City)
🏢 Ciena Canada
📍 Quebec City