This position is listed on behalf of a partner company, which manages all applications and next steps. Our partner is looking for a Senior Director, Engineering based in Canada. We are seeking a senior engineering leader to drive the architecture, development, and delivery of advanced embedded memory IP solutions for semiconductor applications. In this high-impact role, you will lead multidisciplinary memory design teams and shape the technical roadmap across multiple process technologies. You will oversee the development of SRAM, ROM, register files, and dual-port RAM compilers, ensuring competitive performance, power, area, and yield. Combining deep circuit-design expertise with strategic leadership, you will also serve as a senior technical partner to customers throughout presales, integration, and silicon qualification. You will collaborate with engineering, product, sales, and foundry teams to translate complex requirements into production-ready solutions. This is an opportunity to influence next-generation semiconductor technologies while developing engineering talent and strengthening customer partnerships. Accountabilities
- Lead the architecture, circuit design, and physical implementation of embedded memory compilers, including SRAM, ROM, single
- and dual-port register files, and dual-port RAM.
- Define key memory design elements, including bitcell selection, peripheral architecture, decoders, sense amplifiers, write drivers, I/O, self-timing, redundancy, repair strategies, and assist circuits.
- Drive optimization of minimum operating voltage (Vmin), leakage, performance, area, and yield across process, voltage, and temperature (PVT) corners, process variation, and aging conditions.
- Own the technical roadmap for the memory portfolio, including new compiler variants, process nodes, feature enhancements,



and design methodology improvements.
- Establish design, verification, and signoff methodologies, leading design and layout reviews, SPICE/FastSPICE characterization, statistical and Monte Carlo analysis, BIST/repair, DFT, and physical verification.
- Lead silicon validation programs, including test chip development, testing, characterization, and reporting.
- Lead, mentor, and develop a team of memory design engineers across circuit design, layout, characterization, and compiler automation.
- Define team objectives, conduct technical reviews, establish career development paths, and promote engineering rigor and continuous improvement.
- Allocate engineering resources across product roadmaps, customer commitments, and silicon programs while managing schedules, dependencies, and technical risks.
- Act as the senior technical lead in presales engagements, presenting the memory portfolio, qualifying opportunities, and shaping competitive technical proposals.
- Translate customer SoC requirements, including frequency, voltage, density, power, port configuration, and operating modes, into compiler specifications and PPA commitments.
- Partner with sales, field application engineering, and product management teams on RFQs, technical evaluations, and competitive benchmarking.
- Lead technical workshops and detailed design discussions with customer architects and engineering teams,



responding to technical questionnaires and audit-style reviews.
- Own PPA analysis across the memory portfolio, evaluating performance, active and leakage power, area, and yield at both instance and SoC levels.
- Maintain competitive benchmarks against foundry and third-party memory IP, identify performance gaps, and prioritize improvements.
- Conduct sensitivity and trade-off analyses to guide architecture decisions, including bitcell selection, mux ratios, banking, assist circuits, and operating voltage ranges.
- Develop customer-facing technical materials, including datasheets, application notes, and technical white papers.
- Serve as the primary technical contact for strategic customers throughout evaluation, integration, tapeout, and silicon validation.
- Lead integration debugging, technical reviews, silicon correlation discussions, and root-cause analysis of customer-reported issues.
- Coordinate issue resolution across design, characterization, CAD, and product teams, and represent the organization in foundry partner meetings and industry conferences when required.

Requirements:
- Bachelor's, Master's, or PhD in Electrical Engineering, Computer Engineering, or a related technical discipline.
- 10+ years of embedded memory design experience, including demonstrated production tapeouts of SRAM and at least two additional memory types among ROM, single-port register files, dual-port register files, and dual-port RAM.
- Deep expertise in bitcell-level circuit design, memory peripheral circuits, self-timed paths, sense amplifier design, and assist circuit techniques.
- Hands-on experience across multiple semiconductor process nodes, including FinFET and/or advanced sub-7nm technologies.
- Solid c

📌 Senior Director, Engineering (Canada)
🏢 Jobgether
📍 Canada