Verify high-speed I/O chiplets in Ottawa using UVM, SystemVerilog, and protocol expertise. Hybrid arrangements may be considered according to project needs.
BTA Design Services seeks a Senior I/O Chiplet Verification Engineer for multi-protocol connectivity involving UCIe, PCIe, Ethernet, and static switching. You will collaborate across architecture, RTL, verification, firmware, physical design, and IP teams. Your work will establish verification plans and measurable goals for complex interfaces and management functions.
Key Responsibilities: Verify configured IP and end-to-end protocol and PHY connectivity
Check legal static-switch mappings and protocol modes
Measure data integrity, latency, throughput, reset, and recovery
Verify CSR access, boot, configuration, interrupts, and errors




Apply simulation, formal, connectivity, and low-power verification
Requirements: Extensive ASIC verification experience through tape-out sign-off
Ten or more years of relevant hands-on experience
Experience with die-to-die interconnect and high-speed interfaces
Understanding of multi-clock, reset, and protocol corner cases
Ability to explain risks and sign-off evidence clearly
Bring high-speed interface verification, protocol analysis, and UVM expertise to challenging chiplet connectivity programs at BTA Design Services.

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📌 High-Speed I/O Verification Specialist (Quebec City)
🏢 BTA Design Services
📍 Quebec City