Lead high-speed signal and power integrity analysis at Synopsys, using statistical eye modeling, impedance matching, and advanced interface techniques.

This Staff Engineer role supports PHY design through rigorous interconnect and power delivery assessments. You will analyze channel data rates, signal margins, return loss, resonant systems, jitter, and equalization using FFE, DFE, and CTLE techniques. The position also requires communicating findings, conclusions, and recommendations to design teams and external customers. Your work contributes to SIPI methodologies, interconnect budgeting, and strategies for future DDR and HBM technologies within the R&D; circuits team.

Key Responsibilities:

- Predict channel data rates and signal margins
- Analyze eye diagrams through statistical modeling
- Optimize FFE, DFE,



and CTLE equalization strategies
- Refine signal and power analysis methods
- Support PHY design and customer system optimization

Requirements:

- Deep understanding of s-parameters and channel loss
- Expertise in crosstalk, jitter, and power delivery modeling
- Experience with return loss and impedance matching
- Ability to generate and communicate technical recommendations
- Ability to lead issues independently to full closure

Use signal integrity expertise and equalization analysis to improve high-speed PHY designs and customer system performance at Synopsys.

📌 High Speed Signal Integrity Staff Engineer (Ottawa)
🏢 Synopsys
📍 Ottawa