Celero Communications, Inc. is a fast-growing start-up in the semiconductor field. We seek a DSP - FEC Design Engineer to research, design, and evaluate soft‑decision FEC for high‑speed optical systems, with focus on LDPC and staircase codes.
You will model, simulate, and optimize FEC performance while collaborating with DSP/ASIC teams. Solid coding theory background required. Ideal candidates hold a Master’s or Ph.D.