Design complex mask layouts and floorplans at Qualcomm Canada ULC, using Cadence, LVS, and rmap for verification. Work independently across teams and stakeholders.

This engineering services role develops block, macro, and chip-level layouts from project requirements, specifications, and schematics. You will interpret electronic principles, apply layout techniques, and lead work across multiple projects. The position includes technical guidance, troubleshooting, and communication with internal and external stakeholders.

Key Responsibilities:

- Lead complex layout requirements and schematic interpretation
- Build macro layouts and floorplans meeting PPA and yield needs
- Manage top-level testing and validation using Cadence, LVS, and rmap
- Develop design guidelines, manuals, processes,



and checklists
- Lead project priorities, deadlines, deliverables, and resource assignments

Requirements:

- Bachelor's degree and four-plus years designing custom layouts
- Associate's degree and six-plus years designing custom layouts
- High school diploma and eight-plus years designing custom layouts
- Four-plus years using layout design and verification tools
- Experience in analog, mixed-signal, RF, or digital design

Apply advanced layout design, verification, analysis, and leadership skills to complex Qualcomm projects and technical issues.

📌 Senior Mask Layout Design Engineer (Canada)
🏢 QUALCOMM
📍 Canada