Design VHDL RTL digital logic for SEL communications products in Burnaby, BC, using FPGA development and functional verification skills. As an Engineer supporting SEL's R&D; Communications product group, you will develop and support SONET/VSN Multiplexers, Ethernet gateways, network clocks, and switches. The work combines VHDL RTL design, hardware and firmware practices, networking protocols, and exact timing technologies. You will contribute to communication products serving critical infrastructure. Key Responsibilities:

Lead complex VHDL RTL digital logic projects Create and maintain internal RTL design documentation Write test plans and develop RTL verification harnesses Prepare design and system level specifications Participate in peer reviews and project planning Requirements:

Bachelor's degree in Electrical Engineering or related discipline Five-plus years of combined relevant experience VHDL or Verilog FPGA RTL digital design experience Simulation, synthesis, timing analysis, and functional verification experience Firmware experience using C or C++ with FPGA systems Apply VHDL, FPGA, verification, and communications expertise to SEL digital logic development in Burnaby, British Columbia.

📌 VHDL FPGA RTL Design Engineer (Winnipeg)
🏢 Schweitzer Engineering Laboratories (SEL)
📍 Winnipeg