Design high-speed SerDes systems at Qualcomm Canada ULC using analog modeling, mixed-signal verification, and SystemVerilog expertise. Support wired connectivity engineering.This Staff Engineer role focuses on high-speed electrical wireline systems, including SerDes architecture, calibration, verification, and power estimation. You will collaborate with analog, digital, firmware, and silicon validation engineers.

The work supports accurate modeling, system simulations, and post-silicon correlation for complex interconnects.Key Responsibilities:

Develop and verify analog and mixed-signal behavioral modelsDefine calibration algorithms with analog, digital, and firmware teamsVerify analog subsystems, power, aging, and EMIR characteristicsCoordinate system verification across analog, digital,



and firmware componentsSupport silicon bring-up and correlate measurements with modelsRequirements:

Bachelor’s degree in Electrical Engineering with stated experienceStrong background in 106Gbps-or-higher SerDes architecture and verificationProficiency in SystemVerilog and behavioral modeling techniquesKnowledge of SerDes calibration algorithms and equalizationExperience with EDA tools and ASIC design or verificationApply analog mixed-signal expertise, SystemVerilog, and SerDes verification skills to Qualcomm’s high-speed connectivity designs.

📌 Staff Serdes Analog Mixed Signal Engineer (Winnipeg)
🏢 QUALCOMM
📍 Winnipeg