Design high-speed SerDes systems at Qualcomm Canada ULC using analog modeling, mixed-signal verification, and SystemVerilog expertise. Support wired connectivity engineering.

This Staff Engineer role focuses on high-speed electrical wireline systems, including SerDes architecture, calibration, verification, and power estimation. You will collaborate with analog, digital, firmware, and silicon validation engineers. The work supports accurate modeling, system simulations, and post-silicon correlation for complex interconnects.

Key Responsibilities

Develop and verify analog and mixed-signal behavioral models

Define calibration algorithms with analog, digital, and firmware teams

Verify analog subsystems, power, aging, and EMIR characteristics

Coordinate system verification across analog, digital,



and firmware components

Support silicon bring-up and correlate measurements with models

Requirements

Bachelor’s degree in Electrical Engineering with stated experience

Robust background in 106Gbps-or-higher SerDes architecture and verification

Proficiency in SystemVerilog and behavioral modeling techniques

Knowledge of SerDes calibration algorithms and equalization

Experience with EDA tools and ASIC design or verification

Apply analog mixed-signal expertise, SystemVerilog, and SerDes verification skills to Qualcomm’s high-speed connectivity designs.

📌 Staff SerDes Analog Mixed Signal Engineer (Winnipeg)
🏢 Qualcomm
📍 Winnipeg