Drive IP validation at AMD in Markham using SoC architecture, digital design, and advanced debug skills. Help deliver quality processor technologies.

As an IP Validation Design Engineer on AMD’s NBIO Team, you will plan, validate, and debug hardware IP. The work supports forthcoming APU, CPU, Compute, and Discrete Graphics SoC programs. You will collaborate with architects and engineers while developing validation strategies, automation, and system architecture knowledge.

Key Responsibilities:

- Plan and execute functional IP validation strategies
- Assess technical risks with IP and domain architects
- Debug issues across pre-silicon and production phases
- Develop validation scripts, tools, and methodologies
- Support firmware, BIOS, software, and hardware alignment

Requirements:

- Bachelor’s or Master’s degree in EE, CS, or related field
- Experience with digital design, verification, or post-silicon validation
- Extensive ASIC debugging experience and methodologies
- Robust Ruby or Python scripting skills
- Experience with laboratory equipment and board-level debugging

Bring SoC architecture, validation, automation, and analytical problem-solving skills to AMD’s NBIO engineering team in Markham.

📌 IP Validation Design Engineer (Markham)
🏢 Advanced Micro Devices
📍 Markham