Design analog and mixed-signal IP at Microchip Technology as a Senior Engineer, using robust fundamentals and Cadence IC design tools. Support high-performance timing products.
Microchip’s Timing and Communication Group seeks a Senior Engineer individual contributor for robust, manufacturable silicon. You will design analog blocks, model circuits, and collaborate with design leads. The work supports mixed-signal SoC products and long-lifecycle applications.
Key Responsibilities: Design analog IP blocks for mixed-signal SoC products
Simulate circuits and perform PVT corner analysis
Model analog blocks for design evaluation
Implement circuit requirements into production-ready designs
Support silicon validation and lab characterization
Requirements: Master’s or PhD degree in Electrical Engineering
Approximately three to five years’ analog design experience
Experience with analog or mixed-signal IC design
Experience with PLLs, DLLs, ADCs, DACs, filters, or high-speed I/O
Strong analog fundamentals and Cadence IC design tools experience
Apply analog fundamentals, mixed-signal design, and silicon validation experience to Senior Engineer work at Microchip Technology.

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📌 Senior Analog Mixed Signal Design Engineer (Manitoba)
🏢 Microchip Technology
📍 Manitoba