At AMD, we believe technology has the power to solve the world’s most important challenges. From advancing healthcare and scientific discovery to powering AI and the technologies people rely on every day, innovation at AMD is shaping the future. At AMD, we believe technology has the power to solve the world’s most important challenges. From advancing healthcare and scientific discovery to powering AI and the technologies people rely on every day, innovation at AMD is shaping the future. Whether you’re designing next-gen processors, enabling AI breakthroughs, or bringing leading edge products to market, every role at AMD contributes to something bigger — technology that moves the world forward. The RoleAMD’s Network Technologies Solutions Group (NTSG) develops advanced networking silicon and software for data center, cloud, and enterprise infrastructure. Design Verification Engineer to lead verification of complex networking IP, subsystems, and SoCs. You will define verification strategy, develop scalable environments, influence architecture and microarchitecture, and drive functional and performance verification to signoff. You will work on next-generation technologies spanning high-speed Ethernet, PCIe, DMA, packet processing, traffic management, virtualization, and hardware‑software interactions. The PersonWe are seeking a high‑impact Design Verification Engineer with strong technical depth, ownership, and the ability to drive verification closure on complex, high‑performance ASIC designs. You will work in a fast‑paced, highly collaborative environment and contribute directly to the success of next‑generation AMD networking products. Drive test plan creation, feature mapping,



and coverage strategy for complex networking and data‑path IP. Develop high‑quality SystemVerilog components: stimulus generators, agents, BFMs/transactors, scoreboards, checkers, assertions, and functional coverage models. Networking & Performance Verification Verify networking and data-path functions including Ethernet, PCIe, DMA, packet processing, switch fabrics, and traffic management. Develop scenarios covering packet forwarding, buffering, ordering, arbitration, flow control, error handling, and recovery. Verify throughput, latency, bandwidth, fairness, QoS, congestion, and other performance requirements using realistic traffic and stress workloads. Own execution of verification plans, regression triage, and debug of architectural, functional, and performance issues. Use industry‑standard simulation, debug, and analysis tools (VCS, Verdi/DVE, coverage tools, waveform analysis suites). Contribute to verification methodology improvements, automation, and infrastructure enhancements (Python/Tcl/Make). Collaborate closely with RTL design, architecture, validation, firmware, and emulation/HAPS teams to ensure high‑quality deliverables. Participate in design reviews, micro‑architecture definition, and bring a verification perspective into early design stages.



Mentor junior engineers and provide technical leadership within the verification team. LANGUAGES & TOOLSRequired Proven experience in verifying complex IP/subsystems with test plans, coverage, and constrained‑random methodologies Experience with industry protocols such as PCIe, AXI, Ethernet, DDR, DMA engines, or similar data‑path components Scripting skills in Python, Perl, Shell, Tcl, or equivalent for automation and infrastructure Packet-processing pipelines, switch fabrics, schedulers, packet buffers, or traffic managers. Experience with performance verification, power‑aware verification (UPF), or formal verification Exposure to architectural modeling or C/C++ reference models Comfortable working in a rapid‑paced, collaborative, multi‑site environment ACADEMIC CREDENTIALSBachelor’s Degree in Electrical/Computer Engineering or related field, Master’s Preferred AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process. AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here.

📌 Design Verification Engineering (Winnipeg)
🏢 AMD
📍 Winnipeg