Principal FPGA (Ottawa)

Principal FPGA (Ottawa)

07 Nov
|
Ross Video
|
Ottawa

07 Nov

Ross Video

Ottawa

At Ross Video, you’ll be part of a team energized by innovation, building the cutting-edge technology that powers the world’s most watched live productions and events. Our products are designed to be intuitive, reliable, and to deliver exceptional results—because our customers’ success is everything to us. If you’ve ever watched live television, breaking news, major sports, or a Hollywood award show, you’ve seen our technology in action. Join us behind the scenes and help make unforgettable live moments possible.

THE OPPORTUNITY

Join the Hyperconverged Solutions R&D; team developing the FPGA, SoC, embedded-control, and high-speed hardware platforms that power professional live video production.

This is a hands-on, on-site engineering role focused on system-level signal integrity, FPGA and SerDes bring-up, and practical hardware problem-solving. You will work directly with prototype hardware, lab equipment, FPGA tools, embedded software, PCB designers, and cross-functional engineering teams to bring complex products from architecture through production.

The ideal candidate is a pragmatic hardware systems engineer who understands how FPGA logic, PCB construction, signal integrity, power distribution, clocks, firmware, thermal behavior, and manufacturing interact. This position is expected to be primarily performed from the office and is not designed as a mostly work-from-home role.

What You Will Do

- Own or contribute to the architecture, design, implementation, bring-up, and sustaining support of FPGA-based hardware platforms.
- Develop and review requirements, component selections, schematics, FPGA partitioning, interface definitions, timing budgets, and technical risk assessments.




- Own or contribute to system-level signal-integrity analysis across the complete channel, including FPGA transceiver, package and pin breakout, connector, PCB, backplane, cable, and receiving device.
- Develop and review channel models, stackups, routing constraints, loss budgets, crosstalk assumptions, timing margins, and SI simulation results using HyperLynx or equivalent tools.
- Design and debug FPGA, SoC, CPLD, and embedded-control functions using SystemVerilog, Verilog, VHDL, C/C++, Python, Tcl, or shell scripting as appropriate.
- Work with PCB designers on high-density, high-speed boards, including component placement, transceiver breakouts, stackups, fabrication constraints, power distribution, thermal considerations, and design-for-manufacture.
- Bring up and validate high-speed SerDes links using oscilloscopes, BERT/JBERT equipment, vendor tools, eye diagrams, bathtub curves, BER testing, and structured margining.
- Configure and tune FPGA transceiver PMA and PCS parameters, including transmitter emphasis and equalization, receiver equalization, CTLE/DFE settings where applicable, output swing, polarity, clocking, reference clocks, lane alignment, and calibration behavior.
- Develop transceiver initialization, calibration, monitoring, and diagnostic flows that work across board revisions, temperature, voltage, manufacturing variation, and production units.
- Correlate simulation, FPGA transceiver settings,



power behavior, and laboratory measurements to drive links to reliable operation.
- Determine whether failures originate in FPGA configuration, transceiver settings, reference clock, power integrity, PCB channel, connector, backplane, firmware, or the test setup.
- Write and debug low-level software, scripts, diagnostics, and register-access tools used for bring-up, testing, transceiver configuration, and production support.
- Support timing closure, CDC and reset analysis, implementation constraints, resource optimization, and FPGA debug.
- Participate in design reviews, validation planning, ECOs, board revisions, production transfer, RMA investigations, and field-return analysis.
- Collaborate with PCB, mechanical, software, verification, product validation, manufacturing, product management, and customer-support teams.
- Create clear architecture, design, bring-up, test, and troubleshooting documentation.
- Mentor less-experienced engineers and contribute reusable test methods, automation, diagnostics, and design practices.

Technical Workplace

- Large routed platforms, processing blades, FPGA/SoC subsystems, I/O systems, PCIe and Ethernet backbones, crosspoint logic, and embedded control
- System-level SI and PI analysis, high-density PCB construction, stackup selection, high-speed routing, transceiver breakouts, timing budgets, and design-for-manufacture
- AMD and Intel FPGA/SoC devices, integrated transceivers, vendor IP, timing analysis, on-chip debug, PMA/PCS configuration, calibration, and margin testing
- SMPTE SDI, proprietary video interfaces, AES/MADI audio, Ethernet, PCIe, DDR3/DDR4/DDR5, source-synchronous buses, clocks,

📌 Principal FPGA (Ottawa)
🏢 Ross Video
📍 Ottawa

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