Tenstorrent is leading the industry on cutting‐edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC‑V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible.

You will work at the hardware/software boundary to define how those hardware blocks are initialized, coordinated, and used by the runtime. You will determine how workloads are dispatched, scheduled, synchronized, and executed across the accelerator, while solving complex performance problems through implementation, bring‑up, and debugging. An expert C or C++ engineer with a track record of designing and delivering complex, performance‑critical systems.

Experienced working close to hardware in low‑level, embedded, bare‑metal, or accelerator environments and translating hardware specifications into reliable software behavior. Skilled at debugging and optimizing systems end‑to‑end, especially at the hardware/software boundary. A technical leader who collaborates effectively across hardware, firmware, compiler, and systems teams and mentors other engineers.

Define the runtime architecture and implementation that controls execution, scheduling, synchronization, and resource management across Tenstorrent’s custom processor, accelerator, memory, and data‑movement IP. Design runtime interfaces and data‑movement paths that make memory access,



synchronization, and execution productive and predictable. Analyze bottlenecks across the runtime and hardware/software stack, then drive improvements in latency, throughput, scalability, and reliability.

Influence the direction of the runtime stack, engage directly with customers and field‑facing teams, and translate real‑world workload needs into runtime improvements while remaining hands‑on with design, coding, performance analysis, bring‑up, and debugging. How runtime software exposes and controls custom silicon IP, from hardware initialization and execution control through bring‑up, performance analysis, and optimization. How custom silicon IP blocks—including RISC‑V processor cores, accelerator engines, memory systems, data‑movement logic, and interconnects—work together as a complete execution platform.

Advanced techniques for execution control, synchronization, scheduling, and performance optimization on massively parallel hardware. S. export‑controlled technology. S. export laws, including those codified in the U.Export Administration Regulations (EAR), the Company is required to ensure compliance with these laws when transferring technology to nationals of certain countries (such as EAR Country Groups D:1, E1, and E2).

As the position offered will have direct and/or indirect access to information, systems, or technologies subject to these laws, the offer may be contingent upon your citizenship/permanent residency status or ability to obtain prior license approval from the U.Commerce Department or applicable federal agency.

📌 Sr. Staff Engineer, Ip Runtime (Toronto)
🏢 Tenstorrent
📍 Toronto