Own RTL CI/CD infrastructure for Eliyan’s NuLink chiplet interconnect technology, combining Jenkins, quality gates, and synthesis tracking onsite Monday through Friday.
This engineering role centers on reliable design-flow infrastructure across multiple concurrent IP programs. You will manage lint, CDC, RDC, elaboration, synthesis, and STA automation. You will also create dashboards, release gates, and evidence pipelines that help designers promote qualified branches.

Key Responsibilities
Optimize Jenkins-based RTL quality pipelines for turnaround timeDefine release criteria, handoff checkpoints,



and waiver managementCreate dashboards exposing QoR regressions and responsible commitsAutomate clean-run branch gating and release handoff evidenceBuild annotated pull requests from filtered design violationsRequirements: Three-plus years in hardware, EDA, or infrastructure automationStrong Python with Tcl, shell scripting, Git, Linux, and MakefilesExperience debugging and rearchitecting Jenkins or comparable CIAbility to read RTL front-end lint and CDC outputOnsite Monday through Friday at Bay Area, Vancouver, or TorontoBring CI/CD, RTL quality, QoR tracking, and release-gate expertise to Eliyan’s digital design organization. #J-18808-Ljbffr

📌 Rtl Ci/Cd Infrastructure Engineer (Winnipeg)
🏢 Eliyan
📍 Winnipeg