Validate ASIC and FPGA designs onsite in San Diego with Qualcomm Technologies, using SystemVerilog, C/C++, Linux, and Python. Focus on emulation-based verification for complex SoC development.

The Pre-Silicon Validation Engineer develops, deploys, and maintains environments supporting early hardware/software co-validation.

Responsibilities include RTL porting, verification infrastructure, functional analysis, performance debugging, and resource optimization. Collaboration with RTL, verification, architecture, and software teams is central to the work.

Key Responsibilities

Deploy emulation environments for complex SoC designs

Collaborate across RTL, verification, architecture, and software teams

Develop testbenches, transactors, and verification infrastructure





Optimize designs for emulation performance and resource utilization

Document findings and present results to technical leadership

Requirements

Bachelor's degree in science, engineering, or related field

Zero to two or more years of relevant experience

Solid SystemVerilog, C/C++, Linux, shell scripting, and Python skills

Experience with design verification methodologies and RTL debugging

Strong analytical and problem-solving skills

Bring ASIC emulation, FPGA prototyping, verification infrastructure, and cross-functional collaboration to Qualcomm's San Diego engineering group.

📌 ASIC FPGA Emulation Verification Engineer (Winnipeg)
🏢 QUALCOMM
📍 Winnipeg