Drive innovation at Eliyan Technologies as a Verification Engineer specializing in Serdes. This hands-on role focuses on AMS SystemVerilog models and collaboration with the analog team.
As a Verification Engineer at Eliyan Technologies, you will play a pivotal role in creating technologies for chiplet-based systems. With over five years of experience required, expertise in analog design and SystemVerilog is essential. You'll be responsible for developing state-of-the-art RNM models and ensuring they meet schematic quality.
Key Responsibilities
- Develop and execute RNM AMS model for premier PHYs
- Ensure model quality reflects schematic accuracy
- Write and debug UVM/SystemVerilog test cases
- Collaborate closely with design teams for quality assurance
- Understand and analyze analog blocks effectively
Requirements:
- Minimum 5 years of relevant verification experience
- Bachelor’s in Electrical Engineering or related field
- Deep knowledge of analog design concepts
- Proficient in SystemVerilog and assertion coding
- Experience verifying mixed-signal intellectual property
Contribute to tomorrow’s technologies with your verification expertise at Eliyan Technologies#J-18808-Ljbffr