Participate in the functional verification of block(s) of complex ASICs and/or IP cores for a combined CPU/GPU development effort. Work closely with a team of design and verification engineers to understand and verify the functionality of a given design element within the context of the block, chip, and overall system. Document and execute test plans consisting of directed and constrained-random tests to be run during simulation.
Adopt evolving verification methodologies used in the industry to functionally verify increasingly complex SoC designs within aggressive, market-driven schedules, and work within the existing verification infrastructure on active projects. Apply hardware modeling and assertion-based verification methods.
EXPERIENCE AND EDUCATION:
- 10+ years of proven verification experience on large ASIC development projects or software/firmware experience in a hardware development setting.
- Strong background in C/C++ development in a Linux setting.
- Strong debug skills and experience with debug tools such as Gdb and Valgrind.
- Proficient in Object Oriented programming, STL, computer architecture, and data structures.
- Knowledge of Perl and Makefiles.
- Experience in Verilog, SystemVerilog, or SystemC preferred.
- Experience in C/Verilog environment using DPI/PLI preferred.
- Strong analytical skills and attention to detail.
- Strong verbal and written communication skills.