Apply SerDes architecture knowledge to silicon validation at Qualcomm Canada ULC, with hands-on debugging, compliance testing, and data processing.
As a Senior High Speed Validation Engineer, you will evaluate high speed electrical and memory interfaces, including PCIe, IEEE 100G CK, OIF 100G CEI, 224G, and UCIe. You will define test plans, bring up silicon, debug findings, present test results, and deliver validation reports. The position requires project leadership, scripting, and automated test instrumentation.
Key Responsibilities: Define test plans and lead validation projects end to end
Validate PCIe, Ethernet, UCIe, and related standards
Develop standardized scripts for testing and data processing
Automate scopes, BERTs, logic analyzers, VNAs, and supplies
Determine equipment and accessories required for testing
Requirements: Solid understanding of SerDes architecture
Experience validating or debugging high speed interfaces
Python or C/C++ scripting ability
Laboratory experience with automated test instruments
Data processing experience
Bring SerDes, scripting, instrumentation, and compliance expertise to high speed silicon validation within Qualcomm’s ASIC Engineering group.

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📌 SerDes Silicon Validation Engineer (Ontario)
🏢 QUALCOMM
📍 Ontario