Apply DDR and HBM SIPI expertise at Synopsys, analyzing high-speed signaling, power integrity, and interconnect performance across advanced PHY designs.
As a Staff Engineer, you will support the R&D; circuits team delivering SIPI solutions for future DDR and HBM topologies. Your work includes s-parameters, channel loss, crosstalk, equalization, jitter, and power delivery modeling. You will use HFSS, Ansys tools, HSPICE, Raptor, and ADS to evaluate designs and guide improvements.
Key Responsibilities:
Perform interconnect assessments using advanced modeling techniques
Evaluate signal margins, power, and equalization strategies
Assess power delivery for supply stability and lower jitter
Document findings in reports and design guidelines
Communicate recommendations to teams and customers
Requirements:
Experience with DDR or HBM SIPI engineering
Understanding of high-speed interface signaling operation
Knowledge of signal and power integrity analysis methods
Proficiency with HFSS, Ansys tools, HSPICE, Raptor, and ADS
Knowledge of board construction and on-chip IO design
Lead DDR and HBM PHY performance improvements through SIPI analysis, modeling, customer guidance, and transparent technical communication.