Apply SystemVerilog and UVM skills at MDA Space in Sainte-Anne-de-Bellevue, verifying FPGAs for space applications during a four-month mandate.
This Engineering Student internship sits within MDA Space’s FPGA department and reports to a Senior Designer. You will develop test benches, write requirement-based test cases, and support verification activities. The mandate starts in January 2027, with a possibility of eight months.
Key Responsibilities:
- Develop SystemVerilog or VHDL test benches with senior verifiers
- Apply Universal Verification Methodology techniques and approaches
- Write test cases verifying FPGA requirements
- Develop test infrastructure and support laboratory testing
- Document problems and assist designers identifying their sources
Requirements:
- Completed third year of electrical or computer engineering bachelor’s degree
- Minimum demonstrated academic performance of 3.2/4.0
- Desire to learn and sense of initiative
- Team-oriented and dynamic personality
- Security clearance and Controlled Goods Program assessment required
Build FPGA verification experience with SystemVerilog, VHDL, UVM, and laboratory testing at MDA Space in Quebec.