Ciena in Ottawa, Canada, is seeking a Senior SerDes System/DSP Design Engineer to lead architecture, design and validation of high-speed transceivers. You will shape DSP architectures for electrical SerDes and optical IMDD links, collaborating across hardware and software teams to deliver robust, scalable solutions. The role requires a PhD in EE and 8+ years in high-speed link design, with solid MATLAB/Python/C++ skills and experience in MLSD, timing recovery, FEC modeling, and system-level