We have an urgent position below. If you are interested, please share your updated resume with the rate expectation. Role: RTL Design Engineer

Location:
Canada / Remote Duration: Long-Term Contract Detailed

Job Description
s:
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• Strong hands-on experience in RTL Design using Verilog/SystemVerilog.
• Hands-on experience in verification of PCIe (Gen3/Gen4/Gen5) protocols.
• Good understanding of digital design fundamentals, including: FSM design, Pipelining, Clock domain crossing (CDC), Reset architecture, Synchronizers, Low-power design concepts
• Experience in micro-architecture development and RTL implementation.
• Knowledge of synthesis constraints and timing concepts.
• Familiarity with Lint, CDC, STA, and low-power verification methodologies.




• Robust debugging and problem-solving skills.
• Strong hands-on experience in RTL Design using Verilog/SystemVerilog.
• Hands-on experience in PCIe
• Good understanding of digital design fundamentals, including: FSM design, Pipelining, Clock domain crossing (CDC), Reset architecture, Synchronizers, Low-power design concepts Thanks, Elyash Khan Raas Infotek Newark, DE 19702 Direct number: (phone hidden) | 125 Email: [email protected] Company: http://www.raasinfotek.com/ || https://www.linkedin.com/company/raasinfotek/

📌 RTL Design Engineer (Canada)
🏢 Raas Infotek
📍 Canada