Lead Asic Design Engineer — Ai-Optimized Soc Ip (Markham)

Lead Asic Design Engineer — Ai-Optimized Soc Ip (Markham)

03 Nov
|
AMD
|
Markham

03 Nov

AMD

Markham

Lead ASIC Design Engineer for AI-optimized System-on-Chip IP development. Responsibilities include technical leadership, architecture design, mentorship, and driving design strategies for high-performance silicon enabling AI-driven data movement.

📌 Lead Asic Design Engineer — Ai-Optimized Soc Ip (Markham)
🏢 AMD
📍 Markham

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