Senior Pll Design Architect For High-Speed Transceivers (Ottawa)

Senior Pll Design Architect For High-Speed Transceivers (Ottawa)

02 Nov
|
CELERO COMMUNICATIONS
|
Ottawa

02 Nov

CELERO COMMUNICATIONS

Ottawa

Designs and validates high-speed clocking for optical transceivers, focusing on PLLs, VCOs, and analog blocks in advanced CMOS nodes, requiring lab bring-up and validation.

📌 Senior Pll Design Architect For High-Speed Transceivers (Ottawa)
🏢 CELERO COMMUNICATIONS
📍 Ottawa

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