PCIe and CXL verification expertise drives Arm’s high-speed I/O subsystem work. This experienced position focuses on functional and performance verification.
As a Staff Verification Engineer, you will verify sophisticated PCIe and CXL subsystems or SoCs. You will review architecture, create verification strategies, and develop SystemVerilog, Verilog, and UVM tests. The work includes subsystem integration, interoperability, I/O virtualization, and performance analysis. You will collaborate with architects, RTL design and verification engineers across UK, US, Canada, and India.
Key Responsibilities: Verify PCIe and CXL integration at subsystem level
Craft test plans and develop UVM testbenches
Debug simulation and emulation test failures
Improve verification methodologies used by the team
Guide junior team members and support project planning
Requirements: Seven-plus years verifying PCIe or CXL subsystems
Bachelor’s or master’s degree in relevant engineering
Expertise in UVM-based verification and Verilog HDL
Experience with simulation, emulation, and performance analysis
Knowledge of SMMU and GIC integration with PCIe
Apply PCIe, CXL, SystemVerilog, and UVM expertise to Arm subsystem verification and next-generation SoC development.