Use System Verilog and Python to validate complex So C designs as a Pre-Silicon Emulation Engineer with Qualcomm Technologies in San Diego, onsite. Hardware emulation and RTL debugging anchor this engineering work.This Junior/Senior Emulation Engineer supports ASIC and FPGA-based design development and validation. You will build emulation environments, enable hardware/software co-validation, and apply system-level debugging. The work spans verification infrastructure, automation, waveform analysis, and AI-assisted productivity tools.Key Responsibilities: Develop and maintain ASIC and FPGA emulation environmentsPort RTL onto Palladium, Veloce, or FPGA platformsBuild testbenches and transactors using System Verilog and C/C++Debug functional, performance,



and system-level emulation issuesCreate Python automation workflows for regressions and debuggingRequirements: Bachelor's or Master's degree in a related technical fieldZero to two or more years in verification, prototyping, or emulationExpertise with System Verilog, C/C++, Linux, shell scripting, and PythonExperience with RTL debugging and waveform analysisKnowledge of So C architectures, bus protocols, and hardware/software interactionsApply emulation, RTL verification, Python automation, and system-level debugging to Qualcomm So C validation in San Diego.#J-18808-Ljbffr

📌 Pre-Silicon Emulation Validation Engineer (Markham)
🏢 QUALCOMM
📍 Markham