Build AI-augmented RTL quality automation at Eliyan, using Python and Jenkins onsite Monday through Friday in the Bay Area, Vancouver, or Toronto.As a Digital and ASIC Design Automation Engineer, you will own Jenkins-based CI across active design programs. Your work spans lint, CDC, synthesis, STA, Git, Linux, and System Verilog. You will develop applied LLM tooling that makes design-flow decisions faster and clearer.Key Responsibilities: Own Jenkins CI for RTL lint, CDC, RDC, synthesis, and STABuild automated branch qualification and release promotion evidenceTrack synthesis and timing results through project dashboardsDevelop LLM pipelines for violation triage and clusteringImplement spec-to-RTL consistency and documentation checksRequirements: BS or MS in engineering, computer science, or related fieldThree-plus years building automation, CI/CD, or engineering toolingStrong Python, Tcl, shell scripting, Git, Linux, and MakefilesHands-on Jenkins or Git Lab CI or Git Hub Actions experienceWorking RTL front-end, System Verilog, and LLM API knowledgeApply digital design automation, Jenkins, Python, and practical LLM engineering to Eliyan’s RTL development infrastructure onsite.#J-18808-Ljbffr

📌 Digital Design Automation Engineer (Toronto)
🏢 Eliyan
📍 Toronto