Use SystemVerilog and Python to validate complex SoC designs as a Pre-Silicon Emulation Engineer with Qualcomm Technologies in San Diego, onsite. Hardware emulation and RTL debugging anchor this engineering work.This Junior/Senior Emulation Engineer supports ASIC and FPGA-based design development and validation. You will build emulation settings, enable hardware/software co-validation, and apply system-level debugging. The work spans verification infrastructure, automation, waveform analysis, and AI-assisted productivity tools.Key Responsibilities:
Develop and maintain ASIC and FPGA emulation environmentsPort RTL onto Palladium, Veloce, or FPGA platformsBuild testbenches and transactors using SystemVerilog and C/C++Debug functional, performance,



and system-level emulation issuesCreate Python automation workflows for regressions and debuggingRequirements:
Bachelor's or Master's degree in a related technical fieldZero to two or more years in verification, prototyping, or emulationExpertise with SystemVerilog, C/C++, Linux, shell scripting, and PythonExperience with RTL debugging and waveform analysisKnowledge of SoC architectures, bus protocols, and hardware/software interactionsApply emulation, RTL verification, Python automation, and system-level debugging to Qualcomm SoC validation in San Diego.
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📌 Pre Silicon Emulation Validation Engineer Winnipeg
🏢 Qualcomm
📍 Winnipeg