Advance low-power edge artificial intelligence through FeFET arrays, CNN inference, and mixed-signal circuit design at 3IT in Sherbrooke.

This PhD research project at Université de Sherbrooke focuses on designing and validating FeFET-based in-memory computing architectures. You will address analog programming, circuit modeling, CNN hardware mapping, and experimental characterization. The work supports edge-AI applications by processing data locally and comparing fabricated circuits with digital references.

Key Responsibilities:

- Define CNN architectures, weight representation, and FeFET-array layer mapping
- Develop SPICE or Verilog-A FeFET device models
- Design memory cells, MAC arrays, and peripheral circuits
- Simulate accuracy, energy, latency, throughput,



and silicon area
- Characterize MPW-fabricated circuits and measured CNN performance

Requirements:

- PhD or equivalent in electrical or computer engineering
- Background in microelectronics or applied physics
- Interest in analog or mixed-signal design and emerging memories
- Assets include Cadence, SPICE, Verilog-A, VLSI, Python, or PyTorch
- Scientific rigor, autonomy, teamwork, and French or English communication

Develop FeFET models, CNN accelerators, and measured in-memory computing systems for low-power edge-AI research.

📌 FeFET In-Memory Computing PhD Researcher (Canada)
🏢 Université de Sherbrooke
📍 Canada