29 Oct
|
QUALCOMM
|
Vancouver
29 Oct
QUALCOMM
Vancouver
Elevate your engineering career as a Design Verification Engineer at Qualcomm in Canada. Focus on comprehensive ASIC verification lifecycle from system-level concepts to post-silicon support in this creative role.As a key player in Qualcomm's Engineering Group, you'll handle pre-silicon test planning and develop testbenches using advanced methodologies like System Verilog-UVM. This role requires expertise in digital power IP verification, automation for efficiency, and collaboration throughout the verification process. A strong foundation in ASIC design and verification is crucial for success in this position.Key Responsibilities:
- Develop comprehensive pre-silicon test plans for digital IPs
- Create and maintain advanced testbenches using System Verilog-UVM
- Implement coverage development and assertion model verification
- Collaborate on power-aware UPF verification methodologies
- Automate processes to enhance verification efficiencyRequirements:
- Bachelor’s degree in Engineering or related field
- 2+ years of experience in ASIC design and verification
- Proficiency in RTL languages like System Verilog or Verilog
- Familiarity with digital design concepts and computer architecture
- Scripting skills in Perl or Python for automationUtilize your ASIC design and verification skills at Qualcomm to help shape future technologies.#J-18808-Ljbffr
📌 Qualcomm Asic Design Verification Engineer (Vancouver)
🏢 QUALCOMM
📍 Vancouver