Explore memory subsystem verification with NVIDIA in Toronto during Summer 2027. Apply computer architecture, logic design, and debugging skills.
As an ASIC Verification Intern, you will verify memory subsystem components used in NVIDIA Tegra SOCs. The internship involves understanding design changes and building comprehensive verification plans. You will collaborate across RTL, performance verification, FPGA, software, and post-silicon teams.
Key Responsibilities: Verify memory subsystem components for Tegra SOCs
Bring up features with RTL engineers
Use dynamic simulations or Formal verification techniques
Coordinate software testing with FPGA and software teams
Participate in post-silicon verification and debugging
Requirements: Pursuing Electrical Engineering or Computer Engineering studies
Knowledge of computer architecture and logic design
Knowledge of verification methods, algorithms, and data structures
Ability to break problems down using first principles
Positive collaboration and cross-disciplinary teamwork skills
Build practical verification experience across Tegra memory components, simulations, RTL features, software testing, and post-silicon debug.

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📌 Memory Subsystem Verification Intern (Ontario)
🏢 NVIDIA
📍 Ontario