Apply C/C++ and verification expertise to complex ASIC and IP core development for a combined CPU/GPU effort. Work within an established verification infrastructure.

As a Design Verification Engineer, you will verify block functionality across chip and system contexts. The work includes test planning, simulation, constrained-random testing, and evolving SoC verification methodologies. You will collaborate with design and verification engineers while supporting active projects and market-driven schedules.

Key Responsibilities:

- Verify complex ASIC and IP core functionality
- Document and execute directed verification test plans
- Run constrained-random tests during simulation
- Understand designs within block, chip, and system contexts




- Apply hardware modeling or assertion-based verification methods

Requirements:

- Minimum five years of proven verification experience
- Strong C/C++ development background in Linux environments
- Robust debugging skills with Gdb or Valgrind
- Object-oriented programming, STL, architecture, and data structures proficiency
- Knowledge of Perl and Makefiles; Verilog experience preferred

Use ASIC verification, C/C++, simulation, and debugging skills to support complex CPU/GPU development projects.

📌 ASIC Functional Verification Engineer (Markham)
🏢 LanceSoft
📍 Markham