Build FPGA RTL and IP solutions with Altera’s PACE team in Toronto, focusing on verification and high-speed data transmission interfaces.

This student intern position supports advanced FPGA architecture, design definition, implementation, and verification. You will work with PHY-lite, MIPI, and LVDS-based IP cores while integrating designs with Quartus Prime. The work includes simulation models, design examples, technical documentation, and collaboration across engineering teams.

Key Responsibilities:

- Develop RTL for video, display, and data interfaces
- Design architectures using current protocol specifications
- Verify IP with frameworks, models, and regression tests
- Integrate device support with CAD tools
- Support hardware power-on, debugging, and product rollout

Requirements:

- Pursuing a bachelor’s degree in engineering or computer science
- Three-plus months designing or verifying digital logic hardware
- Experience with SystemVerilog, Verilog, or VHDL
- Three-plus months using scripting or programming languages
- Problem-solving, communication, initiative, and teamwork skills

Apply FPGA design, RTL, verification, and programming skills while developing high-speed interface IP solutions with Altera.

📌 FPGA RTL Design Intern (Toronto)
🏢 Altera
📍 Toronto