Advance AMD silicon quality through AI-assisted verification, regression analysis, and automation. Lead technical direction for complex HUB and Router IP designs. This Principal Design Verification Engineer role combines deep verification expertise with practical AI, data analysis, and workflow automation. You will help AMD’s IOHUB team scale methodologies across product variants and silicon generations. Collaboration spans architecture, design, emulation, firmware, subsystem verification, and AI tool development teams across global sites. Key Responsibilities:

Identify practical AI and machine learning verification opportunities Analyze regression trends and historical failure signatures Develop coverage, stimulus, assertion, and debug improvements Define metrics for production workflow adoption Influence technical decisions through structured trade-off analysis Requirements:

Hands-on interest in AI-enabled verification applications Experience with prompt engineering or workflow orchestration Modern verification methodology and closure strategy expertise Understanding of routing, caching, coherency, and memory hierarchy Solid communication, documentation, planning, and collaboration skills Use AI-enabled verification, data-driven analysis, and automation expertise to improve quality, productivity, and debug efficiency at AMD.

📌 AI-Enabled Silicon Verification Leader (Winnipeg)
🏢 Amphenol ICC
📍 Winnipeg