Excel in silicon validation with Synopsys as a Senior Staff Engineer. Utilize ATE programming and complex debug skills in a hands-on lab setting.At Synopsys, you'll shape memory interface IP in our Nepean lab. With over 8 years of silicon validation experience, you will tackle mixed-signal systems and address complex issues across hardware and firmware during production. Your expertise in ATE programming and deep knowledge of DDR and HBM protocols will drive product readiness.Key Responsibilities:
- Develop ATE test programs for memory interfaces
- Perform electrical characterization using advanced lab equipment
- Debug mixed-signal systems for root cause analysis
- Validate IP against JEDEC and automotive standards
- Generate detailed technical documentation and reportsRequirements:
- 8+ years of experience in silicon validation
- Proficiency in ATE platforms like Teradyne and Advantest
- Strong knowledge of DDR, LPDDR, and HBM protocols
- Experience with jitter analysis and timing validation
- Bachelor's or Master's in Electrical EngineeringLeverage your validation expertise to ensure Synopsys memory IP meets critical quality and reliability standards.#J-18808-Ljbffr

📌 Synopsys Senior Staff Engineer Role (Quebec City)
🏢 Synopsys
📍 Quebec City